vyos-documentation.git - VyOS readthedocs (mirror of https://github.com/vyos/vyos-documentation.git)

Age	Commit message (Collapse)	Author
2026-05-06	feat: flip swap mechanism — MD as primary, RST as override (Phase 1)	Yuriy Andamasov
	This is the first of three phases inverting the per-page swap mechanism so MD becomes the canonical primary and RST becomes the rare override. Phase 1 — file renames + conf.py exclude_patterns flip only: - Rename docs//md-<stem>.md to docs//<stem>.md (drop md- prefix) for all 254 stems previously listed in docs/_swap.txt - Rename docs//<stem>.rst to docs//rst-<stem>.rst (add rst- prefix) for the same 254 stems - Repurpose docs/_swap.txt as docs/_rst_overrides.txt; initially empty comment-only since no pages need the RST fallback right now - conf.py exclude_patterns flipped: rst-.rst is now excluded by default instead of md-.md - conf.py runtime-artifact references updated to _rst_override_state.json and _md_exclude.txt (Phase 2 will rewrite swap_sources.py to produce these names; for now no swap script runs because overrides list is empty) Phase 2 (next commit on this branch) will rewrite scripts/swap_sources.py with inverted rename direction, delete scripts/import_myst.py + tests, and update tests/test_swap_sources.py for the new semantics. Phase 3 will be the cleanup pass and ready-for-review flip. Generated by robots https://vyos.io
2026-03-05	doc: proofread docs in /vpp/configuration/dataplane directory (#1777)	Quill
	* Initial proofread * buffers.rst * cpu.rst * index.rst * interface.rst * proofread ipsec.rst * Proofread ipv6, l2learn, lcp * Proofread remaining files in /dataplane * Fix line length lint errors
2026-02-23	vpp: T8261: Refactor resource settings into 'resource-allocation' section ↵	Nataliia S.
	(#1775)
2025-09-25	vpp: Enhanced memory, buffers, and CGNAT documentation, added ↵	zdc
	troubleshooting (#1687) * vpp: Enhanced memory and buffer configuration documentation - Added physmem configuration section with practical examples and troubleshooting - Clarified relationship between physmem and buffer allocation with cross-references - Improved VPP logging documentation with detailed log location descriptions - Fixed formatting issues in system configuration * vpp: Added CGNAT memory requirements Expanded CGNAT settings page with information about: - Memory requirements - Hardcoded simultaneous sessions limit * vpp: Added troubleshooting page Added page with basic steps for troubleshooting: - Capturing packets (PCAP) - Tracing packets - Additional diagnostics information from VPP - Automatic collection of most details with Python script --------- Co-authored-by: Daniil Baturin <daniil@baturin.org>
2025-09-22	vpp: T7805: Delete 'default-hugepage-size' from memory section (#1685)	Nataliia S.

2025-09-04	VPP: Add comprehensive VPP documentation	zdc
	This commit introduces extensive documentation for VyOS VPP (Vector Packet Processing) Dataplane interfaces and features, including examples. Features documented: * VPP integration description, base requirements and limitations * VPP dataplane core settings * Features enabled in the dataplane: ACL, IPsec, NAT, sFlow * VPP interface types: bonding, bridge, GRE, IPIP, kernel, loopback, VXLAN, XConnect Note: This is an initial documentation version that will require ongoing improvements based on user feedback and questions, real-world deployment testing and validation, additional use cases and configuration scenarios discovered in production. Therefore, all pages are marked as "need improvement".